Fast Low Level Disk Encryption Using FPGAs

Debrup Chakraborty; Sebati Ghosh; Cuauhtemoc Mancillas Lopez; Palash Sarkar

Paper 2024/1336

Fast Low Level Disk Encryption Using FPGAs

Debrup Chakraborty, Indian Statistical Institute

Sebati Ghosh, University of York

Cuauhtemoc Mancillas Lopez, CINVESTAV-IPN

Palash Sarkar

, Indian Statistical Institute

Abstract

A fixed length tweakable enciphering scheme (TES) is the appropriate cryptographic functionality for low level disk encryption. Research on TES over the last two decades have led to a number of proposals many of which have already been implemented using FPGAs. This paper considers the FPGA implementations of two more recent and promising TESs, namely AEZ and FAST. The relevant architectures are described and simulation results on the Xilinx Virtex 5 and Virtex 7 FPGAs are presented. For comparison, two IEEE standard schemes, XCB and EME2 are considered. The results indicate that FAST outperforms the other schemes making it a serious candidate for future incorporation by disk manufacturers and standardisation bodies.

Metadata

Available format(s): PDF
Category: Secret-key cryptography
Publication info: Preprint.
Keywords: tweakable enciphering scheme block cipher disk encryption FPGA
Contact author(s): debrup @ isical ac in
sebati1987 @ gmail com
cuauhtemoc mancillas83 @ gmail com
palash @ isical ac in
History: 2024-08-30: approved; 2024-08-26: received; See all versions
Short URL: https://ia.cr/2024/1336
License: CC BY

BibTeX

@misc{cryptoeprint:2024/1336,
      author = {Debrup Chakraborty and Sebati Ghosh and Cuauhtemoc Mancillas Lopez and Palash Sarkar},
      title = {Fast Low Level Disk Encryption Using {FPGAs}},
      howpublished = {Cryptology {ePrint} Archive, Paper 2024/1336},
      year = {2024},
      url = {https://eprint.iacr.org/2024/1336}
}