Paper 2022/1635

FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption

Michiel Van Beirendonck, KU Leuven
Jan-Pieter D'Anvers, KU Leuven
Ingrid Verbauwhede, KU Leuven

Fully Homomorphic Encryption is a technique that allows computation on encrypted data. It has the potential to drastically change privacy considerations in the cloud, but high computational and memory overheads are preventing its broad adoption. TFHE is a promising Torus-based FHE scheme that heavily relies on bootstrapping, the noise-removal tool that must be invoked after every encrypted gate computation. We present FPT, a Fixed-Point FPGA accelerator for TFHE bootstrapping. FPT is the first hardware accelerator to heavily exploit the inherent noise present in FHE calculations. Instead of double or single-precision floating-point arithmetic, it implements TFHE bootstrapping entirely with approximate fixed-point arithmetic. Using an in-depth analysis of noise propagation in bootstrapping FFT computations, FPT is able to use noise-trimmed fixed-point representations that are up to 50% smaller than prior implementations using floating-point or integer FFTs. FPT's microarchitecture is built as a streaming processor inspired by traditional streaming DSPs: it instantiates high-throughput computational stages that are directly cascaded, with simplified control logic and routing networks. We explore different throughput-balanced compositions of streaming kernels with a user-configurable streaming width in order to construct a full bootstrapping pipeline. FPT's streaming approach allows 100% utilization of arithmetic units and requires only small bootstrapping key caches, enabling an entirely compute-bound bootstrapping throughput of 1 BS / 35$\mu$s. This is in stark contrast to the established classical CPU approach to FHE bootstrapping acceleration, which tends to be heavily memory and bandwidth-constrained. FPT is fully implemented and evaluated as a bootstrapping FPGA kernel for an Alveo U280 datacenter accelerator card. FPT achieves almost three orders of magnitude higher bootstrapping throughput than existing CPU-based implementations, and 2.5$\times$ higher throughput compared to recent ASIC emulation experiments.

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Publication info
Fully Homomorphic Encryption TFHE Hardware Accelerator FPGA
Contact author(s)
michiel vanbeirendonck @ esat kuleuven be
janpieter danvers @ esat kuleuven be
Ingrid Verbauwhede @ esat kuleuven be
2022-12-09: revised
2022-11-24: received
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      author = {Michiel Van Beirendonck and Jan-Pieter D'Anvers and Ingrid Verbauwhede},
      title = {FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption},
      howpublished = {Cryptology ePrint Archive, Paper 2022/1635},
      year = {2022},
      note = {\url{}},
      url = {}
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