Paper 2019/568

Post Quantum ECC on FPGA Platform

Debapriya Basu Roy and Debdeep Mukhopadhyay


Post-quantum cryptography has gathered significant attention in recent times due to the NIST call for standardization of quantum resistant public key algorithms. In that context, supersingular isogeny based key exchange algorithm (SIKE) has emerged as a potential candidate to replace traditional public key algorithms like RSA and ECC. SIKE provides $\mathbf{O(\sqrt[4]{p})}$ classical security and $\mathbf{O(\sqrt[6]{p})}$ quantum security where $p$ is the characteristic of the underlying field. Additionally, SIKE has the smallest key sizes among all the post-quantum public algorithm, making it very suitable for bandwidth constrained environment. In this paper, we present an efficient implementation of SIKE protocol for FPGA based applications. The proposed architecture provides the same latency as that of the best existing implementation of SIKE protocol while consuming $48\%$ less DSPs and $58\%$ less block RAM resources. Thus, our design is substantially more efficient compared to that of existing implementations of SIKE.

Available format(s)
Publication info
Preprint. MINOR revision.
ECCPost -QuantumFPGA
Contact author(s)
dbroy24 @ gmail com
2019-05-27: received
Short URL
Creative Commons Attribution


      author = {Debapriya Basu Roy and Debdeep Mukhopadhyay},
      title = {Post Quantum ECC on FPGA Platform},
      howpublished = {Cryptology ePrint Archive, Paper 2019/568},
      year = {2019},
      note = {\url{}},
      url = {}
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