Cryptology ePrint Archive: Report 2017/814

Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve

Philipp Koppermann and Fabrizio De Santis and Johann Heyszl and Georg Sigl

Abstract: We present the first hardware implementations of Diffie-Hellman key exchange based on the Kummer surface of Gaudry and Schost's genus-$2$ curve targeting a $128$-bit security level. We describe a single-core architecture for low-latency applications and a multi-core architecture for high-throughput applications. Synthesized on a Xilinx Zynq-7020 FPGA, our architectures perform a key exchange with lower latency and higher throughput than any other reported implementation using prime-field elliptic curves at the same security level. Our single-core architecture performs a scalar multiplication in $82$ microseconds while our multi-core architecture achieves a throughput of $91{,}226$ scalar multiplications per second. When compared to similar implementations of Microsoft's Four$\mathbb{Q}$ on the same FPGA, this translates to an improvement of $48\%$ in latency and $40\%$ in throughput for the single-core and multi-core architecture, respectively. Both our designs exhibit constant-time execution to thwart timing attacks, use the Montgomery ladder for improved resistance against SPA, and support a countermeasure against fault attacks.

Category / Keywords: implementation / Diffie-Hellman key exchange, hyperelliptic curve cryptography, Kummer surface, FPGA, Zynq, low-latency, high-throughput, fault countermeasure

Date: received 28 Aug 2017

Contact author: philipp koppermann at aisec fraunhofer de

Available format(s): PDF | BibTeX Citation

Version: 20170831:181749 (All versions of this report)

Short URL: ia.cr/2017/814

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