Efficient Conflict-Free NTT Hardware Architecture with Single-Port RAMs: Applications to ML-DSA

Henrique S. Ogawa; Thales B. Paiva; Marcos A. Simplicio Jr; Syed M. Hafiz; Bahattin Yildiz

Paper 2026/621

Efficient Conflict-Free NTT Hardware Architecture with Single-Port RAMs: Applications to ML-DSA

Henrique S. Ogawa, LG Electronics USA, Inc

Thales B. Paiva, University of São Paulo

Marcos A. Simplicio Jr, University of São Paulo

Syed M. Hafiz, LG Electronics USA, Inc

Bahattin Yildiz, LG Electronics USA, Inc

Abstract

We present a Number Theoretic Transform (NTT) hardware architecture based on the Prouhet-Thue-Morse (PTM) code, enabling NTT implementations relying only on single-port RAMs (SPRAMs), rather than using dual-port RAMs (DPRAMs) as usually done in the literature. We show that the PTM code supports a conflict-free, transactional, and streamlined pipeline across all NTT computation stages, as well as scalable parallelism through multiple butterfly units. Using this approach, we design single- and dual-butterfly NTT modules for ML-DSA that are compliant with reference software and can be packaged as a standalone AXI-Stream peripheral, allowing the forward and inverse NTT operations to be offloaded from software via DMA transfers. Experimental results show that the proposed PTM-based NTT designs achieve near one-cycle-per-butterfly and half-cycle-per-butterfly performance for the single- and dual-butterfly configurations, respectively. At the same time, it maintains FPGA resource utilization comparable to state-of-the-art compact NTT implementations relying on mixed SPRAM/DPRAM architectures or SPRAM-only designs requiring coefficient reordering.

Note: Manuscript is currently under review.

Metadata

Available format(s): PDF
Category: Implementation
Publication info: Preprint.
Keywords: Post-Quantum Cryptography Number Theoretic Transform memory allocation patterns hardware implementations ML-DSA
Contact author(s): henrique1 ogawa @ lge com
thalespaiva @ larc usp br
msimplicio @ larc usp br
syedmahbub hafiz @ lge com
bahattin yildiz @ lge com
History: 2026-04-01: approved; 2026-03-30: received; See all versions
Short URL: https://ia.cr/2026/621
License: CC BY

BibTeX

@misc{cryptoeprint:2026/621,
      author = {Henrique S. Ogawa and Thales B. Paiva and Marcos A. Simplicio Jr and Syed M. Hafiz and Bahattin Yildiz},
      title = {Efficient Conflict-Free {NTT} Hardware Architecture with Single-Port {RAMs}: Applications to {ML}-{DSA}},
      howpublished = {Cryptology {ePrint} Archive, Paper 2026/621},
      year = {2026},
      url = {https://eprint.iacr.org/2026/621}
}