Paper 2026/531
A Review of IC Logical Reverse Engineering Techniques
Abstract
In the modern, globalized supply chain for application specific integrated circuits (ASICs), reverse engineering (RE) techniques can be employed for malicious and benign reasons. This survey defines the specific problem of logical RE from a hardware security perspective, examines the earliest RE-adjacent techniques, organizes contemporary RE works by both objective and methodology, and summarizes publication trends and the evolution of logical RE over the years. We review existing techniques, tracing their evolution from manual evaluation and structural analysis to graph theory and machine learning-based solutions. In addition, the survey identifies common trends and evaluation practices, discussing the strengths and drawbacks of the current literature. We also present a set of unique unaddressed problems, highlighting areas that have not been sufficiently explored as well as completely novel problems in ASIC RE. In conclusion, our findings provide a valuable foundation for researchers interested in RE and the future of the field.
Metadata
- Available format(s)
-
PDF
- Category
- Foundations
- Publication info
- Preprint.
- Keywords
- Reverse engineeringHardware securityApplication specific integrated circuitsMachine learning
- Contact author(s)
-
kx2 @ andrew cmu edu
ldfranck @ cmu edu
pagliarini @ cmu edu - History
- 2026-03-19: approved
- 2026-03-16: received
- See all versions
- Short URL
- https://ia.cr/2026/531
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2026/531,
author = {Kevin Xu and Lucas Daudt Franck and Samuel Pagliarini},
title = {A Review of {IC} Logical Reverse Engineering Techniques},
howpublished = {Cryptology {ePrint} Archive, Paper 2026/531},
year = {2026},
url = {https://eprint.iacr.org/2026/531}
}
