Parameter-Aware and Instruction-Driven  Dilithium Optimization on AVX2 and NEON

Shi Ya; Liu Bingqian; Lu Xianhui; Qian Wenfei; Liu Ying; Wang Kunpeng

Paper 2026/1272

Parameter-Aware and Instruction-Driven Dilithium Optimization on AVX2 and NEON

Shi Ya, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Liu Bingqian, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Lu Xianhui, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Qian Wenfei, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Liu Ying, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Wang Kunpeng, State Key Laboratory of Cyberspace Security Defense, Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences

Abstract

We improve the performance of the lattice-based cryptosystem Dilithium on AVX2 and NEON by deeply exploiting its algorithmic properties, such as small coefficient bounds and high sparsity, with the distinct instruction-level profiles of the underlying architectures. On AVX2, we deploy a single-modulus 16-bit NTT for $c \cdot \mathbf{s}_i$ and a multi-moduli 16-bit NTT coupled with a vectorized CRT reconstruction for $c \cdot \mathbf{t}_0$. These instruction-level optimizations accelerate the respective computations by $2.4$--$2.5\times$ and $1.2$--$1.3\times$ over official AVX2 baselines, ultimately reducing the overall Dilithium signature generation time by $7\%$ to $8\%$. Conversely, On ARMv8-A NEON, we retain the efficient 16-bit NTT for $c \cdot \mathbf{s}_i$, while proposing a Fast Sparse Polynomial Multiplication (Fast-SPM) method for $c \cdot \mathbf{t}_0$. By exploiting the extreme sparsity of the challenge polynomial, Fast-SPM entirely bypasses the NTT and converts the computation into highly efficient index-shifted additions. Across the tested NEON platforms (Cortex-A72 and Apple M1 Pro), this hybrid approach achieves a $1.9$--$2.1\times$ speedup for $c \cdot \mathbf{s}_i$ alongside a $1.1$--$1.9\times$ acceleration for $c \cdot \mathbf{t}_0$, which translates into a $10\%$ to $13\%$ reduction in the overall signature generation time.

Metadata

Available format(s): PDF
Category: Applications
Publication info: Preprint.
Keywords: Lattice-based cryptography Dilithium Number Theoretic Transform SIMD AVX2 NEON
Contact author(s): shiya @ iie ac cn
liubingqian @ iie ac cn
luxianhui @ iie ac cn
qianwenfei @ iie ac cn
liuying @ iie ac cn
wangkunpeng @ iie ac cn
History: 2026-06-19: approved; 2026-06-17: received; See all versions
Short URL: https://ia.cr/2026/1272
License: CC BY-NC-ND

BibTeX

@misc{cryptoeprint:2026/1272,
      author = {Shi Ya and Liu Bingqian and Lu Xianhui and Qian Wenfei and Liu Ying and Wang Kunpeng},
      title = {Parameter-Aware and Instruction-Driven  Dilithium Optimization on {AVX2} and {NEON}},
      howpublished = {Cryptology {ePrint} Archive, Paper 2026/1272},
      year = {2026},
      url = {https://eprint.iacr.org/2026/1272}
}