The Fact of the MATTER: Efficient Hardware Accelerators for Wide-Block Memory Encryption

Shubham Namdeo Shende; Utsav Banerjee

Paper 2026/1115

The Fact of the MATTER: Efficient Hardware Accelerators for Wide-Block Memory Encryption

Shubham Namdeo Shende

, Indian Institute of Science Bangalore

Utsav Banerjee

, Indian Institute of Science Bangalore

Abstract

Tweakable block ciphers are important cryptographic primitives for secure memory encryption and partial mitigation of bit flip attacks. Rapid advancements in data-intensive applications such as artificial intelligence and machine learning have motivated the development of new memory technologies with very large data bus widths requiring wide-block memory encryption and its efficient implementation. Recently, the MATTER family of wide-block tweakable ciphers has been proposed for memory encryption in emerging applications. MATTER is a 512-bit balanced Feistel construction which uses the light-weight ASCON permutation as its round function. In this work, we present a comprehensive design space exploration of hardware architectures for accelerating different configurations of MATTER. We provide a detailed comparative analysis of power, performance, area and energy of round-based, unrolled and pipelined hardware implementations of MATTER based on digital synthesis using a 7nm FinFET ASIC standard cell library. We also discuss the suitability of these architectures for different application-specific memory encryption hardware requirements in emerging edge computing systems.

Metadata

Available format(s): PDF
Category: Implementation
Publication info: Published elsewhere. Minor revision. 2025 IEEE International Conference on Intelligent Computing and Systems at the Edge (ICEdge)
DOI: 10.1109/ICEdge67252.2025.11412927
Keywords: lightweight cryptography memory encryption tweakable wide-block ciphers MATTER ASCON hardware accelerators ASIC
Contact author(s): shubhamn @ iisc ac in
utsav @ iisc ac in
History: 2026-06-02: approved; 2026-05-31: received; See all versions
Short URL: https://ia.cr/2026/1115
License: CC BY

BibTeX

@misc{cryptoeprint:2026/1115,
      author = {Shubham Namdeo Shende and Utsav Banerjee},
      title = {The Fact of the {MATTER}: Efficient Hardware Accelerators for Wide-Block Memory Encryption},
      howpublished = {Cryptology {ePrint} Archive, Paper 2026/1115},
      year = {2026},
      doi = {10.1109/ICEdge67252.2025.11412927},
      url = {https://eprint.iacr.org/2026/1115}
}