Paper 2025/717

GKR for Boolean Circuits with Sub-linear RAM Operations

Yuncong Hu, Shanghai Jiao Tong University
Chongrong Li, Shanghai Jiao Tong University
Zhi Qiu, Polyhedra Networks
Tiancheng Xie, Polyhedra Networks
Yue Ying, National University of Singapore
Jiaheng Zhang, National University of Singapore
Zhenfei Zhang, Polyhedra Networks
Abstract

Succinct Non-Interactive Arguments of Knowledge (SNARKs) provide a powerful cryptographic framework enabling short, quickly verifiable proofs for computational statements. Existing SNARKs primarily target computations represented as arithmetic circuits. However, they become inefficient when handling binary operations, as each gates operates on a few bits while still incurring the cost of multiple field operations per gate. This inefficiency stems, in part, from their inability to capture the word-level operations that are typical in real-world programs. To better reflect this computational pattern, we shift our attention to data-parallel boolean circuits, which serve as a natural abstraction of word-level operations by allowing parallel munipulation of multiple bits. To precisely characterize the prover's overheads in our scheme, we adopt the word RAM model, which aligns with the nature of modern programming languages. Under this model, we propose a novel approach to achieve SNARKs with only sub-linear prover overhead for proving boolean circuits. Specifically, we present an optimized GKR protocol for boolean circuits that captures the word-level operations. To achieve this, we pack multiple bits as a single univariate polynomial, and exploiting the binary nature of circuit values to enable precomputation to accelerate the sumcheck process. This optimization leads to a highly efficient prover requiring only sub-linear RAM operations. Furthermore, we introduce a sub-linear polynomial commitment scheme designed specifically for binary polynomials, which ensures efficient commitments with minimal computational overhead. Comprehensive evaluations reveal that our scheme achieves both theoretical efficiency and substantial practical performance gains. For instance, in proving randomly generated Boolean circuits with gates, proof generation with our optimized GKR protocol completes in just 5.38 seconds, yielding a speedup over LogUp (Haböck, ePrint 2022), the most efficient known scheme for lookup arguments. Furthermore, in an end-to-end benchmark over the Keccak- task, our scheme achieves a speedup compared to Binius (Diamond et al., EUROCRYPT 2025), the state-of-the-art work for boolean circuits.

Metadata
Available format(s)
PDF
Category
Cryptographic protocols
Publication info
Preprint.
Keywords
zero-knowledgezk-SNARKs
Contact author(s)
huyuncong @ sjtu edu cn
lichongrong9 @ gmail com
chonps @ polyhedra network
tc @ polyhedra network
yolanda yueying @ gmail com
jhzhang @ nus edu sg
zhenfei @ polyhedra network
History
2025-04-23: revised
2025-04-21: received
See all versions
Short URL
https://ia.cr/2025/717
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2025/717,
      author = {Yuncong Hu and Chongrong Li and Zhi Qiu and Tiancheng Xie and Yue Ying and Jiaheng Zhang and Zhenfei Zhang},
      title = {{GKR} for Boolean Circuits with Sub-linear {RAM} Operations},
      howpublished = {Cryptology {ePrint} Archive, Paper 2025/717},
      year = {2025},
      url = {https://eprint.iacr.org/2025/717}
}
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