Paper 2025/1882

MATCHI: formal verification of hardware private circuits

Gaëtan Cassiers, CryptoExperts (France), UCLouvain
Abstract

Hardware Private Circuits (HPC) provide a compositional framework for designing masked hardware circuits, ensuring security against side-channel attacks in the robust probing model with glitches and transitions. There is however a gap between the simplified circuit models and real-world implementations. In particular, some parts are of real circuits are ignored in the simplified models. Further, designing implementations such that they have a simple static correspondence to the theory can be challenging (e.g., around the requirement of splitting the computation into gadgets), or even infeasible (e.g., when some hardware elements like memory are used for different purposes during the executions). In this work, we close this gap by introducing a new model for hardware circuits that include the control and randomness distribution logic. It also allows some computation on the shares to be performed outside the delimited gadgets. We introduce a new open-source compositional masking verification tool, MATCHI. Thanks to the formalization of a composition framework for the new circuit model, we prove that any circuit successfully verified by MATCHI is secure in the threshold probing model with glitches and transitions.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
Keywords
Side-channelHardware private circuitPINIFormal verification
Contact author(s)
gaetan cassiers @ uclouvain be
History
2025-10-11: approved
2025-10-09: received
See all versions
Short URL
https://ia.cr/2025/1882
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2025/1882,
      author = {Gaëtan Cassiers},
      title = {{MATCHI}: formal verification of hardware private circuits},
      howpublished = {Cryptology {ePrint} Archive, Paper 2025/1882},
      year = {2025},
      url = {https://eprint.iacr.org/2025/1882}
}
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