Paper 2025/1658

High-Throughput EdDSA Verification on Intel Processors with Advanced Vector Extensions

Bowen Zhang, University of Luxembourg
Hao Cheng, Shandong University
Johann Großschädl, University of Luxembourg
Peter Y. A. Ryan, University of Luxembourg
Abstract

The Edwards-curve Digital Signature Algorithm (EdDSA) is a deterministic digital signature scheme that has recently been adopted in a range of popular security protocols. Verifying an EdDSA signature involves the computation of a double-scalar multiplication of the form $SB - hA$, which is a costly operation. The vector extensions of modern Intel processors, such as AVX2 and AVX-512, offer a variety of options to speed up double-scalar multiplication thanks to their massive SIMD-parallel processing capabilities. However, in certain application domains like fintech or e-voting, several or many EdDSA verifications have to be performed, and what counts in the end is not the execution time of one single signature verification, but how long it takes to verify a certain number of signatures. For such applications, it makes more sense to use SIMD instructions to maximize the throughput of a batch of verification operations instead of minimizing the latency of one verification. In this paper, we introduce high-throughput AVX2/AVX-512 implementations of EdDSA verification executing four (resp., eight) instances of double-scalar multiplication in a SIMD-parallel fashion, whereby each instance uses a 64-bit element of the 256-bit (resp., 512-bit) vectors. We analyze three techniques for double-scalar multiplication, one that separates the computation of $SB$ and $hA$, while the other two integrate or interleave them based on a joint-sparse form or non-adjacent form representation of the scalars $S$ and $h$. Our experiments with 256-bit AVX2 vectorization on an Intel Cascade Lake CPU show that the separate method achieves the best results and reaches a single-core throughput of 48,182 double-scalar multiplications per second, which exceeds the throughput of the currently fastest latency-optimized implementation by 33%.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. SAC'25
Keywords
Throughput-optimized cryptographyDouble-scalar multiplicationSIMDAdvanced vector extensions
Contact author(s)
bowen zhang 002 @ student uni lu
hao cheng @ sdu edu cn
johann groszschaedl @ uni lu
History
2025-09-17: approved
2025-09-13: received
See all versions
Short URL
https://ia.cr/2025/1658
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2025/1658,
      author = {Bowen Zhang and Hao Cheng and Johann Großschädl and Peter Y. A. Ryan},
      title = {High-Throughput {EdDSA} Verification on Intel Processors with Advanced Vector Extensions},
      howpublished = {Cryptology {ePrint} Archive, Paper 2025/1658},
      year = {2025},
      url = {https://eprint.iacr.org/2025/1658}
}
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