Paper 2024/423
Plan your defense: A comparative analysis of leakage detection methods on RISC-V cores
Abstract
Hardening microprocessors against side-channel attacks is a critical aspect of ensuring their security. A key step in this process is identifying and mitigating “leaky" hardware modules, which leak information during the execution of cryptographic algorithms. In this paper, we explore how different leakage detection methods, the Side-channel Vulnerability Factor (SVF) and the Test Vector Leakage Assessment (TVLA), contribute to hardening of microprocessors. We conduct experiments on two RISC-V cores, SHAKTI and Ibex, using two cryptographic algorithms, SHA-3 and AES. Our findings suggest that SVF and TVLA can provide valuable insights into identifying leaky modules. However, the effectiveness of these methods can vary depending on the specific core and cryptographic algorithm in use. We conclude that the choice of leakage detection method should be based not only on computational cost but also on the specific requirements of the system, the implementation of the algorithm examined and the nature of the potential threats.
Note: SAMOS 2024
Metadata
- Available format(s)
-
PDF
- Category
- Applications
- Publication info
- Preprint.
- Keywords
- Pre-Silicon DesignSide-Channel AnalysisLeakage Detection MethodsHardening Microprocessors
- Contact author(s)
-
kmiteloudi @ cs ru nl
asmita adhikary @ ru nl
niels @ vandrueten nl
lejla @ cs ru nl
ileana buhan @ ru nl - History
- 2024-06-20: revised
- 2024-03-11: received
- See all versions
- Short URL
- https://ia.cr/2024/423
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2024/423,
author = {Konstantina Miteloudi and Asmita Adhikary and Niels van Drueten and Lejla Batina and Ileana Buhan},
title = {Plan your defense: A comparative analysis of leakage detection methods on {RISC}-V cores},
howpublished = {Cryptology {ePrint} Archive, Paper 2024/423},
year = {2024},
url = {https://eprint.iacr.org/2024/423}
}
