Paper 2024/1828

Classic McEliece Hardware Implementation with Enhanced Side-Channel and Fault Resistance

Peizhou Gan, Nanyang Technological University, Singapore
Prasanna Ravi, Nanyang Technological University, Singapore
Kamal Raj, Nanyang Technological University, Singapore
Anubhab Baksi, Nanyang Technological University, Singapore
Anupam Chattopadhyay, Nanyang Technological University, Singapore
Abstract

In this work, we propose the first hardware implementation of Classic McEliece protected with countermeasures against Side-Channel Attacks (SCA) and Fault Injection Attacks (FIA). Classic Mceliece is one of the leading candidates for Key Encapsulation Mechanisms (KEMs) in the ongoing round 4 of the NIST standardization process for post-quantum cryptography. In particular, we implement a range of generic countermeasures against SCA and FIA, particularly protected the vulnerable operations such as additive Fast Fourier Transform (FFT) and Gaussian elimination, that have been targeted by prior SCA and FIA attacks. We also perform a detailed SCA evaluation demonstrating no leakage even with 100000 traces (improvement of more than 100× the number of traces compared to unprotected implementation). This comes at a modest total area overhead of between 4× to 7×, depending on the type of implemented SCA countermeasure. Furthermore, we present a thorough ASIC benchmark for SCA and FIA protected Classic McEliece design.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
Keywords
Post-quantum CryptographyClassic McElieceSide-Channel AttackFault Injection AttackCountermeasuresASIC
Contact author(s)
p gan @ imperial ac uk
prasanna ravi @ ntu edu sg
kamal raj @ ntu edu sg
anubhab baksi @ ntu edu sg
anupam @ ntu edu sg
History
2024-11-08: revised
2024-11-07: received
See all versions
Short URL
https://ia.cr/2024/1828
License
Creative Commons Attribution-NonCommercial-ShareAlike
CC BY-NC-SA

BibTeX

@misc{cryptoeprint:2024/1828,
      author = {Peizhou Gan and Prasanna Ravi and Kamal Raj and Anubhab Baksi and Anupam Chattopadhyay},
      title = {Classic {McEliece} Hardware Implementation with Enhanced Side-Channel and Fault Resistance},
      howpublished = {Cryptology {ePrint} Archive, Paper 2024/1828},
      year = {2024},
      url = {https://eprint.iacr.org/2024/1828}
}
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