Paper 2024/1449

Marian: An Open Source RISC-V Processor with Zvk Vector Cryptography Extensions

Thomas Szymkowiak, Tampere University
Endrit Isufi, Tampere University
Markku-Juhani Saarinen, Tampere University
Abstract

The RISC-V Vector Cryptography Extensions (Zvk) were ratified in 2023 and integrated into the main ISA manuals in 2024. These extensions support high-speed symmetric cryptography (AES, SHA2, SM3, SM4) operating on the vector register file and offer significant performance improvements over scalar cryptography extensions (Zk) due to data parallelism. As a ratified extension, Zvk is supported by compiler toolchains and is already being integrated into popular cryptographic middleware such as OpenSSL. We report on Marian, the first open-source hardware implementation of a vector processor with the Zvk extensions. The design is based on the PULP ``Ara'' vector unit, which itself is an extension of the popular CVA6 processor. The implementation is in SystemVerilog and has been tested using Virtex Ultrascale+ FPGA prototyping, with a planned tapeout targeting a 22nm process node. We offer an analysis of the architectural requirements that vector cryptography imposes on a processor, as well as the initial estimates of performance and area for our implementation.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. Minor revision. Poster Abstract in Proc. CCS '24: Proceedings of the 2024 ACM SIGSAC Conference on Computer and Communications Security (CCS '24), October 14--18, 2024, Salt Lake City, UT, USA.
DOI
10.1145/3658644.3691394
Keywords
RISC-VVectorCryptography
Contact author(s)
thomas szymkowiak @ tuni fi
endrit isufi @ tuni fi
markku-juhani saarinen @ tuni fi
History
2024-09-18: revised
2024-09-17: received
See all versions
Short URL
https://ia.cr/2024/1449
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2024/1449,
      author = {Thomas Szymkowiak and Endrit Isufi and Markku-Juhani Saarinen},
      title = {Marian: An Open Source {RISC}-V Processor with Zvk Vector Cryptography Extensions},
      howpublished = {Cryptology {ePrint} Archive, Paper 2024/1449},
      year = {2024},
      doi = {10.1145/3658644.3691394},
      url = {https://eprint.iacr.org/2024/1449}
}
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