Paper 2024/139
Efficient Arithmetic in Garbled Circuits
Abstract
Garbled Circuit (GC) techniques usually work with Boolean circuits. Despite intense interest, efficient arithmetic generalizations of GC were only known from heavy assumptions, such as LWE. We construct arithmetic garbled circuits from circular correlation robust hashes, the assumption underlying the celebrated Free XOR garbling technique. Let $\lambda$ denote a computational security parameter, and consider the integers $\mathbb{Z}_m$ for any $m \geq 2$. Let $\ell = \lceil \log_2 m \rceil$ be the bit length of $\mathbb{Z}_m$ values. We garble arithmetic circuits over $\mathbb{Z}_m$ where the garbling of each gate has size $O(\ell \cdot \lambda)$ bits. Constrast this with Boolean-circuit-based arithmetic, requiring $O(\ell^2\cdot \lambda)$ bits via the schoolbook multiplication algorithm, or $O(\ell^{1.585}\cdot \lambda)$ bits via Karatsuba's algorithm. Our arithmetic gates are compatible with Boolean operations and with Garbled RAM, allowing to garble complex programs of arithmetic values.
Metadata
- Available format(s)
- Category
- Cryptographic protocols
- Publication info
- A minor revision of an IACR publication in EUROCRYPT 2024
- Keywords
- Secure Multiparty ComputationGarbled CircuitsArithmetic Circuits
- Contact author(s)
- daheath @ illinois edu
- History
- 2024-02-02: approved
- 2024-01-31: received
- See all versions
- Short URL
- https://ia.cr/2024/139
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2024/139, author = {David Heath}, title = {Efficient Arithmetic in Garbled Circuits}, howpublished = {Cryptology {ePrint} Archive, Paper 2024/139}, year = {2024}, url = {https://eprint.iacr.org/2024/139} }