Paper 2023/075

Silicon Echoes: Non-Invasive Trojan and Tamper Detection using Frequency-Selective Impedance Analysis

Tahoura Mosavirik, Worcester Polytechnic Institute
Saleh Khalaj Monfared, Worcester Polytechnic Institute
Maryam Saadat Safa, Worcester Polytechnic Institute
Shahin Tajik, Worcester Polytechnic Institute
Abstract

The threat of chip-level tampering and its detection has been widely researched. Hardware Trojan insertions are prominent examples of such tamper events. Altering the placement and routing of a design or removing a part of a circuit for side-channel leakage/fault sensitivity amplification are other instances of such attacks. While semi- and fully-invasive physical verification methods can confidently detect such stealthy tamper events, they are costly, time-consuming, and destructive. On the other hand, virtually all proposed non-invasive side-channel methods suffer from noise and, therefore, have low confidence. Moreover, they require activating the tampered part of the circuit (e.g., the Trojan trigger) to compare and detect the modifications. In this work, we introduce a non-invasive post-silicon tamper detection technique applicable to different classes of tamper events at the chip level without requiring the activation of the malicious circuit. Our method relies on the fact that physical modifications (regardless of their physical, activation, or action characteristics) alter the impedance of the chip. Hence, characterizing the impedance can lead to the detection of the tamper events. To sense the changes in the impedance, we deploy known RF tools, namely, scattering parameters, in which we inject sine wave signals with high frequencies to the power distribution network (PDN) of the system and measure the “echo” of the signal. The reflected signals in various frequency bands reveal different tamper events based on their impact size on the die. To validate our claims, we performed measurements on several proof-of-concept tampered hardware implementations realized on FPGAs manufactured with a 28 nm technology. We further show that deploying the Dynamic Time Warping (DTW) distance can distinguish between tamper events and noise resulting from manufacturing process variation of different chips/boards. Based on the acquired results, we demonstrate that stealthy hardware Trojans, as well as sophisticated modifications of P&R, can be detected.

Metadata
Available format(s)
PDF
Category
Applications
Publication info
Published by the IACR in TCHES 2023
Keywords
Tamper DetectionHardware TrojansPhysical Layer SecurityScattering ParametersImpedance Characterization
Contact author(s)
tmosavirik @ wpi edu
skmonfared @ wpi edu
msafa @ wpi edu
stajik @ wpi edu
History
2023-07-12: last of 2 revisions
2023-01-22: received
See all versions
Short URL
https://ia.cr/2023/075
License
Creative Commons Attribution-NonCommercial-NoDerivs
CC BY-NC-ND

BibTeX

@misc{cryptoeprint:2023/075,
      author = {Tahoura Mosavirik and Saleh Khalaj Monfared and Maryam Saadat Safa and Shahin Tajik},
      title = {Silicon Echoes: Non-Invasive Trojan and Tamper Detection using Frequency-Selective Impedance Analysis},
      howpublished = {Cryptology ePrint Archive, Paper 2023/075},
      year = {2023},
      note = {\url{https://eprint.iacr.org/2023/075}},
      url = {https://eprint.iacr.org/2023/075}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.