Paper 2021/734

First-Order Hardware Sharings of the AES

Siemen Dhooghe, Svetla Nikova, and Vincent Rijmen

Abstract

We provide three first-order sharings of the AES each allowing for a different trade-off between the number of shares and the number of register stages. All sharings use a generalization of the changing of the guards method by allowing randomness to be used in the shared S-box. As a result, the sharings have minimal randomness requirements. The sharings are written out in detail to ease implementation efforts.

Note: - Changed the order of the bits for the linear and inverse linear layers in the S-box sharings. - Changed some typos in the third design.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint. MINOR revision.
Keywords
AESDPAHardwareProbing SecurityThreshold Implementations
Contact author(s)
siemen dhooghe @ esat kuleuven be
History
2021-10-18: last of 2 revisions
2021-06-03: received
See all versions
Short URL
https://ia.cr/2021/734
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2021/734,
      author = {Siemen Dhooghe and Svetla Nikova and Vincent Rijmen},
      title = {First-Order Hardware Sharings of the AES},
      howpublished = {Cryptology ePrint Archive, Paper 2021/734},
      year = {2021},
      note = {\url{https://eprint.iacr.org/2021/734}},
      url = {https://eprint.iacr.org/2021/734}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.