Cryptology ePrint Archive: Report 2021/563

High-Speed NTT-based Polynomial Multiplication Accelerator for CRYSTALS-Kyber Post-Quantum Cryptography

Mojtaba Bisheh-Niasar and Reza Azarderakhsh and Mehran Mozaffari-Kermani

Abstract: This paper demonstrates an architecture for accelerating the polynomial multiplication using number theoretic transform (NTT). Kyber is one of the finalists in the third round of the NIST post-quantum cryptography standardization process. Simultaneously, the performance of NTT execution is its main challenge, requiring large memory and complex memory access pattern. In this paper, an efficient NTT architecture is presented to improve the respective computation time. We propose several optimization strategies for efficiency improvement targeting different performance requirements for various applications. Our NTT architecture, including four butterfly cores, occupies only 798 LUTs and 715 FFs on a small Artix-7 FPGA, showing more than 44% improvement compared to the best previous work. We also implement a coprocessor architecture for Kyber KEM benefiting from our high-speed NTT core to accomplish three phases of the key exchange in 9, 12, and 19 \mus, respectively, operating at 200 MHz.

Category / Keywords: implementation / FPGA, hardware architecture, Kyber, lattice-based cryptography, NTT, post-quantum cryptography.

Date: received 28 Apr 2021

Contact author: mbishehniasa2019 at fau edu

Available format(s): PDF | BibTeX Citation

Version: 20210503:201406 (All versions of this report)

Short URL: ia.cr/2021/563


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