## Cryptology ePrint Archive: Report 2021/456

Hardening Circuit-Design IP Against Reverse-Engineering Attacks

Animesh Chhotaray and Thomas Shrimpton

Abstract: Design-hiding techniques are a central piece of academic and industrial efforts to protect electronic circuits from being reverse-engineered. However, these techniques have lacked a principled foundation to guide their design and security evaluation, leading to a long line of broken schemes. In this paper, we begin to lay this missing foundation.

We establish formal syntax for design-hiding (DH) schemes, a cryptographic primitive that encompasses all known design-stage methods to hide the circuit that is handed to a (potentially adversarial) foundry for fabrication. We give two security notions for this primitive: function recovery (FR) and key recovery (KR). The former is the ostensible goal of design-hiding methods to prevent reverse-engineering the functionality of the circuit, but most prior work has focused on the latter. We then present the first provably (FR,KR)-secure DH scheme, $\mathrm{OneChaff}_{\mathrm{hd}}$. A side-benefit of our security proof is a framework for analyzing a broad class of new DH schemes. We finish by unpacking our main security result, to provide parameter-setting guidance.

Category / Keywords: foundations / cryptography, provable security, design hiding, hardware obfuscation, logic locking, logic encryption, IC camouflaging

Date: received 7 Apr 2021, last revised 16 Aug 2021

Contact author: chho58 at ufl edu, teshrim at ufl edu

Available format(s): PDF | BibTeX Citation

Short URL: ia.cr/2021/456

[ Cryptology ePrint archive ]