Cryptology ePrint Archive: Report 2021/295

Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design

Michael Zuzak and Ankur Srivastava

Abstract: A sizable body of work has identified the importance of architecture and application level security when using logic locking, a family of module level supply chain security techniques, to secure processor ICs. However, prior logic locking research proposes configuring logic locking using only module level considerations. To begin our work, we perform a systematic design space exploration of logic locking in modules throughout a processor IC. This exploration shows that locking with only module level considerations cannot guarantee architecture/application level security, regardless of the locking technique used. To remedy this, we propose a tool-driven security-aware approach to enhance the 2 most effective candidate locking locations, on-chip memory and data path. We show that through minor design modifications of the on-chip memory and data path architecture, one can exponentially improve the architecture/application level security of prior locking art with only a modest design overhead. Underlying our design space exploration and security-aware design approach is ObfusGEM, an open-source logic locking simulation framework released with this work to quantitatively evaluate the architectural effectiveness of logic locking in custom processor architecture configurations.

Category / Keywords: implementation / ObfusGEM, Processor Design Obfuscation, On-Chip Memory Design, Logic Locking, Untrusted Foundry, IP Piracy

Original Publication (in the same form): MEMSYS '20: Proceedings of the International Symposium on Memory Systems
DOI:
10.1145/3422575.3422798

Date: received 5 Mar 2021

Contact author: mzuzak at umd edu

Available format(s): PDF | BibTeX Citation

Version: 20210307:022839 (All versions of this report)

Short URL: ia.cr/2021/295


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