Impeccable Circuits III

Abstract

As a recent fault-injection attack, SIFA defeats most of the known countermeasures. Although error-correcting codes have been shown effective against SIFA, they mainly require a large redundancy to correct a few bits. In this work, we propose a hybrid construction with the ability to detect and correct injected faults at the same time. We provide a general implementation methodology which guarantees the correction of up to $t_c$-bit faults and the detection of at most $t_d$ faulty bits. Exhaustive evaluation of our constructions, by the open-source fault diagnostic tool VerFI, indicate the success of our designs in achieving the desired goals.

Note: This is the authors' version of the article published at IEEE International Test Conference (ITC) 2021. Link: https://urldefense.com/v3/__https://doi.org/10.1109/ITC50571.2021.00024__;!!HJOPV4FYYWzcc1jazlU!40n51PeO_aXGWBgnkWvvGxO-i7Sl8-y8iDLEgks546rM04oMEHFepapTXAjzBNw7lARsrg4YrB5Fdlo5Va17OXK3uUU\$

Available format(s)
Publication info
Published elsewhere. IEEE International Test Conference (ITC) 2021
DOI
10.1109/ITC50571.2021.00024
Keywords
fault analysisfault detectionfault correction
Contact author(s)
History
Short URL
https://ia.cr/2021/1568

CC BY

BibTeX

@misc{cryptoeprint:2021/1568,