Paper 2020/897

Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices

Jan Richter-Brockmann, Johannes Mono, and Tim Güneysu


Contemporary digital infrastructures and systems use and trust PKC to exchange keys over insecure communication channels. With the development and progress in the research field of quantum computers, well established schemes like RSA and ECC are more and more threatened. The urgent demand to find and standardize new schemes - which are secure in a post-quantum world - was also realized by the NIST which announced a PQC Standardization Project in 2017. Recently, the round three candidates were announced and one of the alternate candidates is the KEM scheme BIKE. In this work, we investigate different strategies to efficiently implement the BIKE algorithm on FPGA. To this extend, we improve already existing polynomial multipliers, propose efficient strategies to realize polynomial inversions, and implement the BGF decoder for the first time. Additionally, our implementation is designed to be scalable and generic with the BIKE specific parameters. All together, the fastest designs achieve latencies of 2.69 ms for the key generation, 0.1 ms for the encapsulation, and 1.89 ms for the decapsulation considering the lowest security level.

Note: The update version matches the accepted paper in the IEEE Transactions on Computers.

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Publication info
Published elsewhere. IEEE Transactions on Computers
BIKEQC-MDPCPQCReconfigurable DevicesFPGA
Contact author(s)
jan richter-brockmann @ rub de
2021-05-17: last of 2 revisions
2020-07-16: received
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      author = {Jan Richter-Brockmann and Johannes Mono and Tim Güneysu},
      title = {Folding {BIKE}: Scalable Hardware Implementation for Reconfigurable Devices},
      howpublished = {Cryptology ePrint Archive, Paper 2020/897},
      year = {2020},
      doi = {10.1109/TC.2021.3078294},
      note = {\url{}},
      url = {}
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