Cryptology ePrint Archive: Report 2020/1482

Optimized Polynomial Multiplier Architectures for Post-Quantum KEM Saber

Andrea Basso and Sujoy Sinha Roy

Abstract: Saber is one of the four finalists in the ongoing NIST post-quantum cryptography standardization project. A significant portion of Saber's computation time is spent on computing polynomial multiplications in polynomial rings with powers-of-two moduli. We propose several optimization strategies for improving the performance of polynomial multiplier architectures for Saber, targeting different hardware platforms and diverse application goals. We propose two high-speed architectures that exploit the smallness of operand polynomials in Saber and can achieve great performance with a moderate area consumption. We also propose a lightweight multiplier that consumes only 541 LUTs and 301 FFs on a small Artix-7 FPGA.

Category / Keywords: implementation / Lattice-based Cryptography, Post-Quantum Cryptography, Hardware Implementation, Lightweight Implementation, Saber KEM

Date: received 25 Nov 2020

Contact author: a basso at cs bham ac uk

Available format(s): PDF | BibTeX Citation

Version: 20201129:191103 (All versions of this report)

Short URL: ia.cr/2020/1482


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