Cryptology ePrint Archive: Report 2019/794

Efficient Cryptography on the RISC-V Architecture

Ko Stoffelen

Abstract: RISC-V is a promising free and open-source instruction set architecture. Most of the instruction set has been standardized and several hardware implementations are commercially available. In this paper we highlight features of RISC-V that are interesting for optimizing implementations of cryptographic primitives. We provide the first optimized assembly implementations of table-based AES, bitsliced AES, ChaCha, and the Keccak-$f$[1600] permutation for the RV32I instruction set. With respect to public-key cryptography, we study the performance of arbitrary-precision integer arithmetic without a carry flag. We then estimate the improvement that can be gained by several RISC-V extensions. These performance studies also serve to aid design choices for future RISC-V extensions and implementations.

Category / Keywords: implementation / RISC-V, AES, ChaCha, Keccak, arbitrary-precision arithmetic, software optimization

Original Publication (in the same form): Latincrypt 2019

Date: received 8 Jul 2019, last revised 15 Jul 2019

Contact author: k stoffelen at cs ru nl

Available format(s): PDF | BibTeX Citation

Note: Fixed a wrong number in the HiFive1 specs

Version: 20190715:140432 (All versions of this report)

Short URL: ia.cr/2019/794


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