Cryptology ePrint Archive: Report 2018/431

Lightweight ASIC Implementation of AEGIS-128

Anubhab Baksi and Vikramkumar Pudi and Swagata Mandal and Anupam Chattopadhyay

Abstract: In this paper, we study the problem of implementing the AEAD scheme, AEGIS-128, which is a finalist in the recently concluded competition, CAESAR. In order to achieve lightweight (least area) implementation, we first look into one round of AES encryption, which is a building block in this cipher. In this regard, we make use of the state-of-the-art implementation of AES in ASIC. We benchmark one round AES encryption (which is done for the first time) and later use it with AEGIS-128 to improve the optimized implementation reported (Inscrypt'14). Synthesis results show that our design requires 9.6\% less area and reduces the power consumption by 95.3\% (operating frequency is also reduced). Further, this concept can readily be applied to a variety of other ciphers.

Category / Keywords: ASIC, optimization, encryption, authentication

Original Publication (in the same form): IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018

Date: received 7 May 2018, last revised 11 May 2018, withdrawn 27 May 2018

Contact author: anubhab001 at e ntu edu sg

Available format(s): (-- withdrawn --)

Version: 20180528:041540 (All versions of this report)

Short URL: ia.cr/2018/431


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