Paper 2016/896

Security Analysis of Anti-SAT

Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, and Jeyavijayan Rajendran

Abstract

Logic encryption protects integrated circuits (ICs) against intellectual property (IP) piracy and over- building attacks by encrypting the IC with a key. A Boolean satisfiability (SAT) based attack breaks all existing logic encryption technique within few hours. Recently, a defense mechanism known as Anti-SAT was presented that protects against SAT attack, by rendering the SAT-attack effort exponential in terms of the number of key gates. In this paper, we highlight the vulnerabilities of Anti-SAT and propose signal probability skew (SPS) attack against Anti-SAT block. SPS attack leverages the structural traces in Anti-SAT block to identify and isolate Anti-SAT block. The attack is 100% successful on all variants of Anti-SAT block. SPS attack is scalable to large circuits, as it breaks circuits with up to 22K gates within two minutes.

Metadata
Available format(s)
PDF
Category
Applications
Publication info
Preprint. MINOR revision.
Contact author(s)
bm105 @ nyu edu
History
2016-09-14: received
Short URL
https://ia.cr/2016/896
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2016/896,
      author = {Muhammad Yasin and Bodhisatwa Mazumdar and Ozgur Sinanoglu and Jeyavijayan Rajendran},
      title = {Security Analysis of Anti-SAT},
      howpublished = {Cryptology ePrint Archive, Paper 2016/896},
      year = {2016},
      note = {\url{https://eprint.iacr.org/2016/896}},
      url = {https://eprint.iacr.org/2016/896}
}
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