Cryptology ePrint Archive: Report 2016/884

Robust, low-cost, auditable random number generation for embedded system security

Ben Lampert and Riad S. Wahby and Shane Leonard and Philip Levis

Abstract: This paper presents an architecture for a discrete, high-entropy hardware random number generator. Because it is constructed out of simple hardware components, its operation is transparent and auditable. Using avalanche noise, a nondeterministic physical phenomenon, the circuit is inherently probabilistic and resists adversarial control. Furthermore, because it compares the outputs from two matched noise sources, it rejects environmental disturbances like power supply ripple. The resulting hardware produces more than 0.98 bits of entropy per sample, is inexpensive, has a small footprint, and can be disabled to conserve power when not in use.

Category / Keywords: implementation / hardware RNG, pseudo-randomness

Original Publication (in the same form): ACM SenSys '16

Date: received 7 Sep 2016, last revised 10 Oct 2016

Contact author: rsw at cs stanford edu

Available format(s): PDF | BibTeX Citation

Note: Minor formatting changes.

Version: 20161010:233003 (All versions of this report)

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