Cryptology ePrint Archive: Report 2016/249

Improved Side-Channel Analysis Attacks on Xilinx Bitstream Encryption of 5, 6, and 7 Series

Amir Moradi and Tobias Schneider

Abstract: Since 2012, it is publicly known that the bitstream encryption feature of modern Xilinx FPGAs can be broken by side-channel analysis. Presented at CT-RSA 2012, using graphics processing units (GPUs) the authors demonstrated power analysis attacks mounted on side-channel evaluation boards optimized for power measurements. In this work, we extend such attacks by moving to the EM side channel to examine their practical relevance in real-world scenarios. Furthermore, by following a certain measurement procedure we reduce the search space of each part of the attack from 2^{32} to 2^8, which allows mounting the attacks on ordinary workstations. Several Xilinx FPGAs from different families - including the 7 series devices - are susceptible to the attacks presented here.

Category / Keywords: implementation / side-channel analysis

Original Publication (with minor differences): COSADE 2016

Date: received 6 Mar 2016, last revised 1 Apr 2017

Contact author: amir moradi at rub de

Available format(s): PDF | BibTeX Citation

Note: There is an error in normalization of Fisher's transform formula (pointed by Manuel Ilg <>) in Springer version of the paper. Here it is corrected.

Version: 20170401:061549 (All versions of this report)

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