Paper 2015/744

BitCryptor: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware

Ege Gulcan, Aydin Aysu, and Patrick Schaumont


There is a significant effort in building lightweight cryptographic operations, yet the proposed solutions are typically single-purpose modules that can implement a single functionality. In contrast, we propose BitCryptor, a multi-purpose, bit-serialized compact processor for cryptographic applications on reconfigurable hardware. The proposed crypto engine can perform pseudo-random number generation, strong collision-resistant hashing and variable-key block cipher encryption. The hardware architecture utilizes SIMON, a recent lightweight block cipher, as its core. The complete engine uses a bit-serial design methodology to minimize the area. Implementation results on the Xilinx Spartan-3 s50 FPGA show that the proposed architecture occupies 95 slices (187 LUTs, 102 registers), which is 10$\times$ smaller than the nearest comparable multi-purpose design. BitCryptor is also smaller than the majority of recently proposed lightweight single-purpose designs. Therefore, it is a very efficient cryptographic IP block for resource-constrained domains, providing a good performance at a minimal area overhead.

Available format(s)
Publication info
Preprint. MINOR revision.
Lightweight cryptographybit-serializationhardware architecturecrypto engineSIMONFPGA
Contact author(s)
aydinay @ vt edu
2015-07-24: received
Short URL
Creative Commons Attribution


      author = {Ege Gulcan and Aydin Aysu and Patrick Schaumont},
      title = {{BitCryptor}: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware},
      howpublished = {Cryptology ePrint Archive, Paper 2015/744},
      year = {2015},
      note = {\url{}},
      url = {}
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