Paper 2015/688

Binary Field Multiplication on ARMv8

Hwajeong Seo, Zhe Liu, Yasuyuki Nogami, Jongseok Choi, and Howon Kim

Abstract

In this paper, we show efficient implementations of binary field multiplication over ARMv8. We exploit an advanced 64-bit polynomial multiplication (\texttt{PMULL}) supported by ARMv8 and conduct multiple levels of asymptotically faster Karatsuba multiplication. Finally, our method conducts binary field multiplication within 57 clock cycles for B-251. Our proposed method on ARMv8 improves the performance by a factor of $5.5$ times than previous techniques on ARMv7.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint. MINOR revision.
Contact author(s)
hwajeong84 @ gmail com
History
2015-07-24: revised
2015-07-13: received
See all versions
Short URL
https://ia.cr/2015/688
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2015/688,
      author = {Hwajeong Seo and Zhe Liu and Yasuyuki Nogami and Jongseok Choi and Howon Kim},
      title = {Binary Field Multiplication on ARMv8},
      howpublished = {Cryptology ePrint Archive, Paper 2015/688},
      year = {2015},
      note = {\url{https://eprint.iacr.org/2015/688}},
      url = {https://eprint.iacr.org/2015/688}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.