Paper 2015/348

A Hardware-based Countermeasure to Reduce Side-Channel Leakage - Design, Implementation, and Evaluation

An­dre­as Gor­nik, Amir Mo­ra­di, Jür­gen Oehm, and Chris­tof Paar


Side-channel attacks are one of the major concerns for security-enabled applications as they make use of information leaked by the physical implementation of the underlying cryptographic algorithm. Hence, reducing the side-channel leakage of the circuits realizing the cryptographic primitives is amongst the main goals of circuit designers. In this work we present a novel circuit concept, which decouples the main power supply from an internal power supply that is used to drive a single logic gate. The decoupling is done with the help of buffering capacitances integrated into semiconductor. We also introduce – compared to the previously known schemes – an improved decoupling circuit which reduces the crosstalk from the internal to the external power supply. The result of practical side-channel evaluation on a prototype chip fabricated in a 150nm CMOS technology shows a high potential of our proposed technique to reduce the side-channel leakages.

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Publication info
Published elsewhere. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
side-channel analysisside-channel countermeasurecircuit-level countermeasureASIChardware-based countermeasure
Contact author(s)
amir moradi @ rub de
2015-04-25: revised
2015-04-23: received
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      author = {An­dre­as Gor­nik and Amir Mo­ra­di and Jür­gen Oehm and Chris­tof Paar},
      title = {A Hardware-based Countermeasure to Reduce Side-Channel Leakage - Design, Implementation, and Evaluation},
      howpublished = {Cryptology ePrint Archive, Paper 2015/348},
      year = {2015},
      doi = {10.1109/TCAD.2015.2423274},
      note = {\url{}},
      url = {}
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