Paper 2015/115

Comprehensive Efficient Implementations of ECC on C54xx Family of Low-cost Digital Signal Processors

Muhammad Yasir Malik

Abstract

Resource constraints in smart devices demand an efficient cryptosystem that allows for low power and memory consumption. This has led to popularity of comparatively efficient Elliptic curve cryptog-raphy (ECC). Prior to this paper, much of ECC is implemented on re-configurable hardware i.e. FPGAs, which are costly and unfavorable as low-cost solutions. We present comprehensive yet efficient implementations of ECC on fixed-point TMS54xx series of digital signal processors (DSP). 160-bit prime field GF(p) ECC is implemented over a wide range of coordinate choices. This paper also implements windowed recoding technique to provide better execution times. Stalls in the programming are mini-mized by utilization of loop unrolling and by avoiding data dependence. Complete scalar multiplication is achieved within 50 msec in coordinate implementations, which is further reduced till 25 msec for windowed-recoding method. These are the best known results for fixed-point low power digital signal processor to date.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint. Minor revision.
Keywords
Elliptic curve cryptosystemimplementationdigital signal processor (DSP)low power
Contact author(s)
yasir_alf @ yahoo com
History
2015-02-24: received
Short URL
https://ia.cr/2015/115
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2015/115,
      author = {Muhammad Yasir Malik},
      title = {Comprehensive Efficient Implementations of ECC on C54xx Family of Low-cost Digital Signal Processors},
      howpublished = {Cryptology ePrint Archive, Paper 2015/115},
      year = {2015},
      note = {\url{https://eprint.iacr.org/2015/115}},
      url = {https://eprint.iacr.org/2015/115}
}
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