Paper 2015/1111

Comparison of TERO-cell implementations and characterisation on SRAM FPGAs

Cedric Marchand, Lilian Bossuet, and AbdelKarim Cherkaoui

Abstract

Physical unclonable functions (PUF) are a promising approach in design for trust and security. A PUF derives a unique identifier for different similar dies using some of their physical characteristics, so it can be used to authenticate chips and to fight against counterfeiting and theft of devices. The transient effect ring oscillator (TERO) PUF is based on the extraction of the entropy of the process variations by comparison between TERO cells characteristics. This TERO cells need to be carefully designed in order to construct a PUF. This task need to be done with precision especially in the size of used gates and in the delays of all connections inside the element which is particularly challenging in FPGA. This paper presents the design of TERO cells in two FPGA families: Xilinx Spartan 6 and Altera Cyclone V. In addition, the result of the characterization of the TERO-PUF are compared for the two technologies.

Note: This paper has been accepted as Poster in the FPGA 2016 conference, Thus, only an abstract will appear in the proceedings and not the article.

Metadata
Available format(s)
-- withdrawn --
Category
Implementation
Publication info
Preprint. MINOR revision.
Keywords
Physical unclonable functionPUF designFPGAPUF characterization.
Contact author(s)
cedric marchand @ univ-st-etienne fr
History
2016-02-03: withdrawn
2015-11-18: received
See all versions
Short URL
https://ia.cr/2015/1111
License
Creative Commons Attribution
CC BY
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