Cryptology ePrint Archive: Report 2015/1111

Comparison of TERO-cell implementations and characterisation on SRAM FPGAs

Cedric Marchand and Lilian Bossuet and AbdelKarim Cherkaoui

Abstract: Physical unclonable functions (PUF) are a promising approach in design for trust and security. A PUF derives a unique identifier for different similar dies using some of their physical characteristics, so it can be used to authenticate chips and to fight against counterfeiting and theft of devices. The transient effect ring oscillator (TERO) PUF is based on the extraction of the entropy of the process variations by comparison between TERO cells characteristics. This TERO cells need to be carefully designed in order to construct a PUF. This task need to be done with precision especially in the size of used gates and in the delays of all connections inside the element which is particularly challenging in FPGA. This paper presents the design of TERO cells in two FPGA families: Xilinx Spartan 6 and Altera Cyclone V. In addition, the result of the characterization of the TERO-PUF are compared for the two technologies.

Category / Keywords: implementation / Physical unclonable function, PUF design, FPGA, PUF characterization.

Date: received 16 Nov 2015, withdrawn 3 Feb 2016

Contact author: cedric marchand at univ-st-etienne fr

Available format(s): (-- withdrawn --)

Note: This paper has been accepted as Poster in the FPGA 2016 conference, Thus, only an abstract will appear in the proceedings and not the article.

Version: 20160203:133836 (All versions of this report)

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