Paper 2015/1081

NEON PQCryto: Fast and Parallel Ring-LWE Encryption on ARM NEON Architecture

Reza Azarderakhsh, Zhe Liu, Hwajeong Seo, and Howon Kim

Abstract

Recently, ARM NEON architecture has occupied a significant share of tablet and smartphone markets due to its low cost and high performance. This paper studies efficient techniques of lattice-based cryptography on ARM processor and presents the first implementation of ring-LWE encryption on ARM NEON architecture. In particular, we propose a vectorized version of Iterative Number Theoretic Transform (NTT) for high-speed computation. We present a 32-bit variant of SAMS2 technique, original proposed in CHES’15, for fast reduction. A combination of proposed and previous optimizations results in a very efficient implementation. For 128-bit security level, our ring-LWE implementation requires only 145; 200 clock cycles for encryption and 32; 800 cycles for decryption. These result are more than 17:6 times faster than the fastest ECC implementation on ARM NEON with same security level.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint. MINOR revision.
Contact author(s)
rxaeec @ rit edu
History
2015-11-09: received
Short URL
https://ia.cr/2015/1081
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2015/1081,
      author = {Reza Azarderakhsh and Zhe Liu and Hwajeong Seo and Howon Kim},
      title = {NEON PQCryto: Fast and Parallel Ring-LWE Encryption on ARM NEON Architecture},
      howpublished = {Cryptology ePrint Archive, Paper 2015/1081},
      year = {2015},
      note = {\url{https://eprint.iacr.org/2015/1081}},
      url = {https://eprint.iacr.org/2015/1081}
}
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