Paper 2014/738

A Very Compact FPGA Implementation of LED and PHOTON

N. Nalla Anandakumar, Thomas Peyrin, and Axel Poschmann


LED and PHOTON are new ultra-lightweight cryptographic algorithms aiming at resource-constrained devices. In this article, we describe three different hardware architectures of the LED and PHOTON family optimized for Field-Programmable Gate Array (FPGA) devices. In the first architecture we propose a round-based implementation while the second is a fully serialized architecture performing operations on a single cell per clock cycle. Then, we propose a novel architecture that is designed with a focus on utilizing commonly available building blocks (SRL16). This new architecture, organized in a complex scheduling of the operations, seems very well suited for recent designs that use serial matrices. We implemented both the lightweight block cipher LED and the lightweight hash function PHOTON on the Xilinx FPGA series Spartan-3 (low-cost) and Artix-7 (high-end) devices and our new proposed architecture provides very competitive area-throughput trade-offs. In comparison with other recent lightweight block ciphers, the implementation results of LED show a significant improvement of hardware efficiency and we obtain the smallest known FPGA implementation (as of today) of any hash function.

Available format(s)
Publication info
Published elsewhere. Minor revision. Indocrypt 2014
FPGAlightweight cryptographyLEDPHOTONSRL16
Contact author(s)
thomas peyrin @ gmail com
2014-09-23: received
Short URL
Creative Commons Attribution


      author = {N.  Nalla Anandakumar and Thomas Peyrin and Axel Poschmann},
      title = {A Very Compact FPGA Implementation of LED and PHOTON},
      howpublished = {Cryptology ePrint Archive, Paper 2014/738},
      year = {2014},
      note = {\url{}},
      url = {}
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