Paper 2014/266
ICEPOLE: High-speed, Hardware-oriented Authenticated Encryption
Pawel Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, and Marcin Wojcik
Abstract
This paper introduces our dedicated authenticated encryption scheme ICEPOLE. ICEPOLE is a high-speed hardware-oriented scheme, suitable for high-throughput network nodes or generally any environment where specialized hardware (such as FPGAs or ASICs) can be used to provide high data processing rates. ICEPOLE-128 (the primary ICEPOLE variant) is very fast. On the modern FPGA device Virtex 6, a basic iterative architecture of ICEPOLE reaches 41 Gbits/s, which is over 10 times faster than the equivalent implementation of AES-128-GCM. The throughput-to-area ratio is also substantially better when compared to AES-128-GCM. We have carefully examined the security of the algorithm through a range of cryptanalytic techniques and our findings indicate that ICEPOLE offers high security level.
Metadata
- Available format(s)
-
PDF
- Category
- Secret-key cryptography
- Publication info
- Preprint. MINOR revision.
- Keywords
- authenticated encryption schemeauthenticated cipherICEPOLE
- Contact author(s)
- pawel morawiecki @ gmail com
- History
- 2014-04-20: received
- Short URL
- https://ia.cr/2014/266
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2014/266,
author = {Pawel Morawiecki and Kris Gaj and Ekawat Homsirikamol and Krystian Matusiewicz and Josef Pieprzyk and Marcin Rogawski and Marian Srebrny and Marcin Wojcik},
title = {ICEPOLE: High-speed, Hardware-oriented Authenticated Encryption},
howpublished = {Cryptology ePrint Archive, Paper 2014/266},
year = {2014},
note = {\url{https://eprint.iacr.org/2014/266}},
url = {https://eprint.iacr.org/2014/266}
}
