Cryptology ePrint Archive: Report 2014/237

SIMON Says, Break the Area Records for Symmetric Key Block Ciphers on FPGAs

Aydin Aysu and Ege Gulcan and Patrick Schaumont

Abstract: While AES is extensively in use in a number of applications, its area cost limits its deployment in resource constrained platforms. In this paper, we have implemented SIMON, a recent promising low-cost alternative of AES on reconfigurable platforms. The Feistel network, the construction of the round function and the key generation of SIMON, enables bit-serial hardware architectures which can significantly reduce the cost. Moreover, encryption and decryption can be done using the same hardware. The results show that with an equivalent security level, SIMON is 86\% smaller than AES, 70\% smaller than PRESENT (a standardized low-cost AES alternative), and its smallest hardware architecture only costs 36 slices (72 LUTs, 30 registers). To our best knowledge, this work sets the new area records as we propose the hardware architecture of the smallest block cipher ever published on FPGAs at 128-bit level of security. Therefore, SIMON is a strong alternative to AES for low-cost FPGA based applications.

Category / Keywords: Block Ciphers, Light-Weight Cryptography, FPGA Implementation, SIMON

Original Publication (in the same form): IEEE Embedded Systems Letters

Date: received 1 Apr 2014, last revised 4 Apr 2014

Contact author: aydinay at vt edu

Available format(s): PDF | BibTeX Citation

Note: This is a preprint version of our paper that will be published at the upcoming issue of the IEEE Embedded Systems Letters. This research was supported in part by the National Science Foundation grant no 1115839.

Version: 20140411:194828 (All versions of this report)

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