Cryptology ePrint Archive: Report 2013/554

Formally Proved Security of Assembly Code Against Power Analysis: A Case Study on Balanced Logic

Pablo Rauzy and Sylvain Guilley and Zakaria Najm

Abstract: In his keynote speech at CHES 2004, Kocher advocated that side-channel attacks were an illustration that formal cryptography was not as secure as it was believed because some assumptions (e.g., no auxiliary information is available during the computation) were not modeled. This failure is caused by formal methods' focus on models rather than implementations. In this paper we present formal methods and tools for designing protected code and proving its security against power analysis. These formal methods avoid the discrepancy between the model and the implementation by working on the latter rather than on a high-level model. Indeed, our methods allow us (a) to automatically insert a power balancing countermeasure directly at the assembly level, and to prove the correctness of the induced code transformation; and (b) to prove that the obtained code is balanced with regard to a reasonable leakage model, and we show how to characterize the hardware to use the resources which maximize the relevancy of the model. The tools implementing our methods are then demonstrated in a case study in which we generate a provably protected PRESENT implementation for an 8-bit AVR smartcard.

Category / Keywords: Implementation / Dual-rail, DPA, formal proof, static analysis, symbolic execution, implementation, smartcard, PRESENT, block cipher, Hamming distance, OCaml

Original Publication (with minor differences): JCEN

Date: received 3 Sep 2013, last revised 21 Jun 2015

Contact author: rauzy at enst fr

Available format(s): PDF | BibTeX Citation

Note: Minor update to fix typos and add DOI link.

Version: 20150621:154601 (All versions of this report)

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