Paper 2009/349

Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Grøstl, and Skein

Stefan Tillich, Martin Feldhofer, Wolfgang Issovits, Thomas Kern, Hermann Kureck, Michael Mühlberghuber, Georg Neubauer, Andreas Reiter, Armin Köfler, and Mathias Mayrhofer


The weakening of the widely used SHA-1 hash function has also cast doubts on the strength of the related algorithms of the SHA-2 family. The US NIST has therefore initiated the SHA-3 competition in order to select a modern hash function algorithm as a ``backup'' for SHA-2. This algorithm should be efficiently implementable both in software and hardware under different constraints. In this paper, we present hardware implementations of the four SHA-3 candidates ARIRANG, BLAKE, Grøstl, and Skein with the primary constraint of minimizing chip area.

Available format(s)
Publication info
Published elsewhere. Unknown where it was published
SHA-3hash functionsimplementationhardwarelow-area
Contact author(s)
Stefan Tillich @ iaik tugraz at
2009-07-18: received
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Creative Commons Attribution


      author = {Stefan Tillich and Martin Feldhofer and Wolfgang Issovits and Thomas Kern and Hermann Kureck and Michael Mühlberghuber and Georg Neubauer and Andreas Reiter and Armin Köfler and Mathias Mayrhofer},
      title = {Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Grøstl, and Skein},
      howpublished = {Cryptology ePrint Archive, Paper 2009/349},
      year = {2009},
      note = {\url{}},
      url = {}
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