A Presentation on VEST Hardware Performance, Chip Area Measurements, Power Consumption Estimates and Benchmarking in Relation to the AES, SHA-256 and SHA-512

Benjamin Gittins, Howard A. Landman, Sean O'Neil, and Ron Kelson

A wide-sweeping multi-dimensional analysis and comparison between VEST and the hardware implementations of the AES, AES-HMAC and SHA-2 primitives.

Available format(s): -- withdrawn --
Category: Implementation
Publication info: Published elsewhere. posted on ECRYPT, not published previously
Keywords: stream ciphers hash functions authenticated encryption message digest MAC message authentication code fastest hardware cipher NLFSR parallel feedback RNS residue number system AES SHA-256 SHA-512 SHA-2 FPGA ASIC
Contact author(s): sean @ cryptolib com
History: 2007-04-03: withdrawn; 2005-11-21: received; See all versions
Short URL: https://ia.cr/2005/415
License: CC BY