Cryptology ePrint Archive: Report 2009/349

Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Gr{\o}stl, and Skein

Stefan Tillich and Martin Feldhofer and Wolfgang Issovits and Thomas Kern and Hermann Kureck and Michael M{\"u}hlberghuber and Georg Neubauer and Andreas Reiter and Armin K{\"o}fler and Mathias Mayrhofer

Abstract: The weakening of the widely used SHA-1 hash function has also cast doubts on the strength of the related algorithms of the SHA-2 family. The US NIST has therefore initiated the SHA-3 competition in order to select a modern hash function algorithm as a ``backup'' for SHA-2. This algorithm should be efficiently implementable both in software and hardware under different constraints. In this paper, we present hardware implementations of the four SHA-3 candidates ARIRANG, BLAKE, Gr{\o}stl, and Skein with the primary constraint of minimizing chip area.

Category / Keywords: implementation / SHA-3, hash functions, implementation, hardware, low-area

Date: received 14 Jul 2009

Contact author: Stefan Tillich at iaik tugraz at

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Version: 20090718:044612 (All versions of this report)

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