Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Grøstl, and Skein

Stefan Tillich; Martin Feldhofer; Wolfgang Issovits; Thomas Kern; Hermann Kureck; Michael Mühlberghuber; Georg Neubauer; Andreas Reiter; Armin Köfler; Mathias Mayrhofer

Paper 2009/349

Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Grøstl, and Skein

Stefan Tillich, Martin Feldhofer, Wolfgang Issovits, Thomas Kern, Hermann Kureck, Michael Mühlberghuber, Georg Neubauer, Andreas Reiter, Armin Köfler, and Mathias Mayrhofer

Abstract

The weakening of the widely used SHA-1 hash function has also cast doubts on the strength of the related algorithms of the SHA-2 family. The US NIST has therefore initiated the SHA-3 competition in order to select a modern hash function algorithm as a ``backup'' for SHA-2. This algorithm should be efficiently implementable both in software and hardware under different constraints. In this paper, we present hardware implementations of the four SHA-3 candidates ARIRANG, BLAKE, Grøstl, and Skein with the primary constraint of minimizing chip area.

Metadata

Available format(s): PDF
Category: Implementation
Publication info: Published elsewhere. Unknown where it was published
Keywords: SHA-3 hash functions implementation hardware low-area
Contact author(s): Stefan Tillich @ iaik tugraz at
History: 2009-07-18: received
Short URL: https://ia.cr/2009/349
License: CC BY

BibTeX

@misc{cryptoeprint:2009/349,
      author = {Stefan Tillich and Martin Feldhofer and Wolfgang Issovits and Thomas Kern and Hermann Kureck and Michael Mühlberghuber and Georg Neubauer and Andreas Reiter and Armin Köfler and Mathias Mayrhofer},
      title = {Compact Hardware Implementations of the {SHA}-3 Candidates {ARIRANG}, {BLAKE}, Grøstl, and Skein},
      howpublished = {Cryptology {ePrint} Archive, Paper 2009/349},
      year = {2009},
      url = {https://eprint.iacr.org/2009/349}
}