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Paper 2021/734
First-Order Hardware Sharings of the AES
Siemen Dhooghe and Svetla Nikova and Vincent Rijmen
Abstract
We provide three first-order sharings of the AES each allowing for a different trade-off between the number of shares and the number of register stages. All sharings use a generalization of the changing of the guards method by allowing randomness to be used in the shared S-box. As a result, the sharings have minimal randomness requirements. The sharings are written out in detail to ease implementation efforts.
Note: - Changed the order of the bits for the linear and inverse linear layers in the S-box sharings. - Changed some typos in the third design.
Metadata
- Available format(s)
- Category
- Implementation
- Publication info
- Preprint. MINOR revision.
- Keywords
- AESDPAHardwareProbing SecurityThreshold Implementations
- Contact author(s)
- siemen dhooghe @ esat kuleuven be
- History
- 2023-01-04: last of 4 revisions
- 2021-06-03: received
- See all versions
- Short URL
- https://ia.cr/2021/734
- License
-
CC BY