You are looking at a specific version 20210408:155721 of this paper. See the latest version.

Paper 2021/456

Hardening Circuit-Design IP Against Reverse-Engineering Attacks

Animesh Chhotaray and Thomas Shrimpton

Abstract

Design-hiding techniques are a central piece of academic and industrial efforts to protect electronic circuits from being reverse-engineered. However, these techniques have lacked a principled foundation to guide their design and security evaluation, leading to a long line of broken schemes. In this paper, we begin to lay this missing foundation. We establish formal syntax for design-hiding (DH) schemes, a cryptographic primitive that encompasses all known design-stage methods to hide the circuit that is handed to a (potentially adversarial) foundry for fabrication. We give two security notions for this primitive: function recovery (FR) and key recovery (KR). The former is the ostensible goal of design-hiding methods to prevent reverse-engineering the functionality of the circuit, but most prior work has focused on the latter. We then present the first provably (FR,KR)-secure DH scheme, $OneChaff_{hd}$. A side-benefit of our security proof is a framework for analyzing a broad class of new DH schemes. We finish by unpacking our main security result, to provide parameter-setting guidance.

Metadata
Available format(s)
PDF
Category
Foundations
Publication info
Preprint. MINOR revision.
Keywords
cryptographyprovable securitydesign hidinghardware obfuscationlogic lockinglogic encryptionIC camouflaging
Contact author(s)
chho58 @ ufl edu,teshrim @ ufl edu
History
2022-05-16: last of 3 revisions
2021-04-08: received
See all versions
Short URL
https://ia.cr/2021/456
License
Creative Commons Attribution
CC BY
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.