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Paper 2020/321

Compact domain-specific co-processor for accelerating module lattice-based key encapsulation mechanism

Jose Maria Bermudo Mera and Furkan Turan and Angshuman Karmakar and Sujoy Sinha Roy and Ingrid Verbauwhede

Abstract

We present a domain-specific co-processor to speed up Saber, a post-quantum key encapsulation mechanism competing on the NIST Post-Quantum Cryptography standardization process. Contrary to most lattice-based schemes, Saber doesn’t use NTT-based polynomial multiplication. We follow a hardware-software co-design approach: the execution is performed on an ARM core and only the most computationally expensive operation, i.e., polynomial multiplication, is offloaded to the co-processor to obtain a compact design. We exploit the idea of distributed computing at micro-architectural level together with novel algorithmic optimizations to achieve approximately a 6 times speedup with respect to optimized software at a small area cost.

Note: Update with the acknowledgements and a missing reference

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Available format(s)
PDF
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Implementation
Publication info
Published elsewhere. Minor revision. DAC 2020 - 57th Design and Automation Conference
Keywords
Domain-specific co-processorpost-quantum cryptographylattice- based cryptographySaber
Contact author(s)
Jose Bermudo @ esat kuleuven be
History
2020-04-04: revised
2020-03-17: received
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Short URL
https://ia.cr/2020/321
License
Creative Commons Attribution
CC BY
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