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Paper 2020/1482

Optimized Polynomial Multiplier Architectures for Post-Quantum KEM Saber

Andrea Basso and Sujoy Sinha Roy

Abstract

Saber is one of the four finalists in the ongoing NIST post-quantum cryptography standardization project. A significant portion of Saber's computation time is spent on computing polynomial multiplications in polynomial rings with powers-of-two moduli. We propose several optimization strategies for improving the performance of polynomial multiplier architectures for Saber, targeting different hardware platforms and diverse application goals. We propose two high-speed architectures that exploit the smallness of operand polynomials in Saber and can achieve great performance with a moderate area consumption. We also propose a lightweight multiplier that consumes only 541 LUTs and 301 FFs on a small Artix-7 FPGA.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. Minor revision. DAC 2021
Keywords
Lattice-based CryptographyPost-Quantum CryptographyHardware ImplementationLightweight ImplementationSaber KEM
Contact author(s)
a basso @ cs bham ac uk
History
2021-06-08: revised
2020-11-29: received
See all versions
Short URL
https://ia.cr/2020/1482
License
Creative Commons Attribution
CC BY
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