Cryptology ePrint Archive: Report 2015/831

M-MAP: Multi-Factor Memory Authentication for Secure Embedded Processors

Syed Kamran Haider and Masab Ahmad and Farrukh Hijaz and Astha Patni and Ethan Johnson and Matthew Seita and Omer Khan and Marten van Dijk

Abstract: The challenges faced in securing embedded computing systems against multifaceted memory safety vulnerabilities have prompted great interest in the development of memory safety countermeasures. These countermeasures either provide protection only against their corresponding type of vulnerabilities, or incur substantial architectural modifications and overheads in order to provide complete safety, which makes them infeasible for embedded systems. In this paper, we propose M-MAP: a comprehensive system based on multi-factor memory authentication for complete memory safety, inspired by everyday user authentication factors. We examine certain crucial theoretical and practical implications of composing memory integrity verification and bounds checking protection schemes in a comprehensive system. Based on these implications, we implement M-MAP with hardware based memory integrity verification and software based bounds checking to achieve a balance between hardware modifications and performance. We demonstrate that M-MAP implemented on top of a lightweight out-of-order processor delivers complete memory safety with only $32\%$ performance overhead on average, and incurs minimal hardware modifications and area overhead.

Category / Keywords: implementation / Secure Processor, Memory Safety, Authentication, Memory Integrity, Bounds Checking

Original Publication (with major differences): IEEE International Conference on Computer Design, 2015

Date: received 26 Aug 2015

Contact author: syed haider at engr uconn edu

Available format(s): PDF | BibTeX Citation

Note: This is an extended version of the M-MAP paper published as a poster paper in IEEE International Conference on Computer Design, 2015.

Version: 20150826:175335 (All versions of this report)

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