Cryptology ePrint Archive: Report 2013/282
Available versions in chronological order
20130516:133321 (posted 16-May-2013 13:33:21 UTC)
Three Snakes in One Hole: A 67 Gbps Flexible Hardware for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
20130806:054303 (posted 06-Aug-2013 05:43:03 UTC)
Three Snakes in One Hole: A 67 Gbps Flexible Hardware for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
20131118:054805 (posted 18-Nov-2013 05:48:05 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
20150525:212643 (posted 25-May-2015 21:26:43 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
20150525:212930 (posted 25-May-2015 21:29:30 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
20150525:213238 (posted 25-May-2015 21:32:38 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
Original publication (with minor differences): To appear in IEEE Transactions on Computers (accepted may 2015)
20150525:213321 (posted 25-May-2015 21:33:21 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
Original publication (with minor differences): To appear in IEEE Transactions on Computers (accepted may 2015)
20150525:213506 (posted 25-May-2015 21:35:06 UTC)
Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
Goutam Paul and Anupam Chattopadhyay
Original publication (with minor differences): To appear in IEEE Transactions on Computers (accepted May 2015)
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