Paper 2016/968
System Clock and Power Supply Cross-Checking for Glitch Detection
Pei Luo, Chao Luo, and Yunsi Fei
Abstract
Cryptographic systems are vulnerable to different kinds of fault injection attacks. System clock glitch is one of the most widely used fault injection methods used in different attacks. In this paper, we propose a method to detect glitches in system clock to fight against clock glitch based fault attacks. We implement the proposed scheme in Virtex-5 FPGA and inject clock glitches into FPGA, results show that the proposed scheme can be easily implemented in both ASICs and FPGAs with very small overhead. Detection results show that the proposed scheme can detect very high frequency clock glitches with very high detection rate.
Metadata
- Available format(s)
-
PDF
- Category
- Implementation
- Publication info
- Preprint. MINOR revision.
- Contact author(s)
- silenceluo @ gmail com
- History
- 2016-10-10: received
- Short URL
- https://ia.cr/2016/968
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2016/968,
author = {Pei Luo and Chao Luo and Yunsi Fei},
title = {System Clock and Power Supply Cross-Checking for Glitch Detection},
howpublished = {Cryptology {ePrint} Archive, Paper 2016/968},
year = {2016},
url = {https://eprint.iacr.org/2016/968}
}
