Cryptology ePrint Archive: Report 2016/481

Side-Channel Analysis Protection and Low-Latency in Action - case study of PRINCE and Midori

Amir Moradi and Tobias Schneider

Abstract: During the last years, the industry sector showed particular interest in solutions which allow to encrypt and decrypt data within one clock cycle. Known as low-latency cryptography, such ciphers are desirable for pervasive applications with real-time security requirements. On the other hand, pervasive applications are very likely in control of the end user, and may operate in a hostile environment. Hence, in such scenarios it is necessary to provide security against side-channel analysis (SCA) attacks while still keeping the low-latency feature. Since the single-clock-cycle concept requires an implementation in a fully-unrolled fashion, the application of masking schemes - as the most widely studied countermeasure - is not straightforward. The contribution of this work is to present and discuss about the difficulties and challenges that hardware engineers face when integrating SCA countermeasures into low-latency constructions. In addition to several design architectures, practical evaluations, and discussions about the problems and potential solutions with respect to the case study PRINCE (also compared with Midori), the final message of this paper is a couple of suggestions for future low-latency designs to - hopefully - ease the integration of SCA countermeasures.

Category / Keywords: implementation / Side-Channel Analsysi, Masking, Threshold Implementation, PRINCE, Midori, Low Latency

Original Publication (with minor differences): IACR-ASIACRYPT-2016
DOI:
10.1007/978-3-662-53887-6_19

Date: received 19 May 2016, last revised 21 Oct 2016

Contact author: amir moradi at rub de

Available format(s): PDF | BibTeX Citation

Version: 20161021:134937 (All versions of this report)

Short URL: ia.cr/2016/481

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