Cryptology ePrint Archive: Report 2016/203

White-Box Cryptography in the Gray Box - A Hardware Implementation and its Side Channels

Pascal Sasdrich and Amir Moradi and Tim GŁneysu

Abstract: Implementations of white-box cryptography aim to protect a secret key in a white-box environment in which an adversary has full control over the execution process and the entire environment. Its fundamental principle is the map of the cryptographic architecture, including the secret key, to a number of encoded tables that shall resist the inspection and decomposition of an attacker. In a gray-box scenario, however, the property of hiding required implementation details from the attacker could be used as a promising mitigation strategy against side-channel attacks (SCA). In this work, we present a first white-box implementation of AES on reconfigurable hardware for which we evaluate this approach assuming a gray-box attacker. We show that - unfortunately - such an implementation does not provide sufficient protection against an SCA attacker. We continue our evaluations by a thorough analysis of the source of the observed leakage, and present additional results which can be used to build stronger white-box designs.

Category / Keywords: White-Box, Side-Channel, CPA, FPGA, AES

Original Publication (with minor differences): IACR-FSE-2016

Date: received 25 Feb 2016, last revised 24 Jun 2016

Contact author: pascal sasdrich at rub de

Available format(s): PDF | BibTeX Citation

Note: updated acknowledgment

Version: 20160624:114038 (All versions of this report)

Short URL: ia.cr/2016/203

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